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DAC
2003
ACM
14 years 8 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
IWPSE
2003
IEEE
14 years 25 days ago
CVS Release History Data for Detecting Logical Couplings
The dependencies and interrelations between classes and modules affect the maintainability of object-oriented systems. It is therefore important to capture weaknesses of the softw...
Harald Gall, Mehdi Jazayeri, Jacek Krajewski
DSD
2006
IEEE
135views Hardware» more  DSD 2006»
13 years 11 months ago
Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography
Until now, most cryptography implementations on parallel architectures have focused on adapting the software to SIMD architectures initially meant for media applications. In this ...
Jacques J. A. Fournier, Simon W. Moore
HASE
2007
IEEE
14 years 1 months ago
Integrating Product-Line Fault Tree Analysis into AADL Models
Fault Tree Analysis (FTA) is a safety-analysis technique that has been recently extended to accommodate product-line engineering for critical domains. This paper describes a tool-...
Hongyu Sun, Miriam Hauptman, Robyn R. Lutz
ISOLA
2010
Springer
13 years 6 months ago
Ten Years of Performance Evaluation for Concurrent Systems Using CADP
This article comprehensively surveys the work accomplished during the past decade on an approach to analyze concurrent systems qualitatively and quantitatively, by combining functi...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Fr...