122 search results - page 9 / 25 » An Approach to Formal Verification of Arithmetic Functions i... |
ISSS
2002
IEEE
14 years 18 days ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
CAV
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
TCAD
2002
13 years 7 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
CADE
2008
Springer
14 years 8 months ago
2008
Springer
Abstract. Operating-system verification gains increasing research interest. The complexity of such systems is, however, challenging and many endeavors are limited in some respect: ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...