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DAC
1994
ACM
15 years 8 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
CAV
2000
Springer
125views Hardware» more  CAV 2000»
15 years 8 months ago
Efficient Reachability Analysis of Hierarchical Reactive Machines
Hierarchical state machines is a popular visual formalism for software specifications. To apply automated analysis to such specifications, the traditional approach is to compile th...
Rajeev Alur, Radu Grosu, Michael McDougall
FPGA
2008
ACM
133views FPGA» more  FPGA 2008»
15 years 6 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
Jason Yu, Guy Lemieux, Christopher Eagleston
105
Voted
DAGSTUHL
2010
15 years 6 months ago
Computing an Optimal Layout for Cone Trees
Many visual representations for trees have been developed in information and software visualization. One of them are cone trees, a well-known three-dimensional representation for ...
Dirk Zeckzer, Fang Chen, Hans Hagen
132
Voted
APVIS
2004
15 years 6 months ago
Inhomogeneous Force-Directed Layout Algorithms in the Visualisation Pipeline: From Layouts to Visualisations
The visualisation pipeline approach is a flexible and extensible technique for generating visualisations. The basic pipeline functions involve the capture and representation of da...
Neville Churcher, Warwick Irwin, Carl Cook