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DAC
1999
ACM
15 years 9 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
178
Voted
IWMM
2000
Springer
78views Hardware» more  IWMM 2000»
15 years 9 months ago
On the Type Accuracy of Garbage Collection
We describe a novel approach to obtaining type-accurate information for garbage collection in a hardware and language independent way. Our approach uses a run-time analysis to pro...
Martin Hirzel, Amer Diwan
ISCI
1998
193views more  ISCI 1998»
15 years 5 months ago
A Parallel Implementation of Genetic Programming that Achieves Super-Linear Performance
: This paper describes the successful parallel implementation of genetic programming on a network of processing nodes using the transputer architecture. With this approach, researc...
David Andre, John R. Koza
DSN
2007
IEEE
15 years 11 months ago
Fault Tolerant Planning for Critical Robots
Autonomous robots offer alluring perspectives in numerous application domains: space rovers, satellites, medical assistants, tour guides, etc. However, a severe lack of trust in t...
Benjamin Lussier, Matthieu Gallien, Jér&eac...
CODES
2001
IEEE
15 years 9 months ago
Modeling and evaluation of hardware/software designs
We introduce the foundation of a system modeling environment targeted at capturing the anticipated interactions of hardware and software behaviors -- not just their co-execution. ...
Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas