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» An Architecture for Exploring Large Design Spaces
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MASCOTS
2010
13 years 6 months ago
Black-Box Performance Modeling for Solid-State Drives
—Flash-based Solid-State Drives (SSDs) have become a promising alternative to magnetic Hard Disk Drives (HDDs) thanks to the large improvements in performance, power consumption,...
Shan Li, H. Howie Huang
ICASSP
2008
IEEE
14 years 2 months ago
Automatic synthesis of VLSI architectures for arbitrary lifting-based filter banks and transforms
Recently, the conventional lifting scheme that is widely used for the construction of Wavelets and 2-channel filter banks has been extended to M-channel filter banks (M > 2)....
Ruben Bartholomä, Thomas Greiner, Frank Kesel...
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 2 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
DSN
2007
IEEE
14 years 2 months ago
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions
This paper concerns the validity of a widely used method for estimating the architecture-level mean time to failure (MTTF) due to soft errors. The method first calculates the fai...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Protocol Transducer Synthesis using Divide and Conquer approach
One of the efficient design methodologies for large scale System on a Chip (SoC) is IP-based design. In this methodology, a system is considered as a set of components and intercon...
Shigeru Watanabe, Kenshu Seto, Y. Ishikawa, Satosh...