Sciweavers

239 search results - page 14 / 48
» An Architecture for Kernel-Level Verification of Executables...
Sort
View
ISCAPDCS
2008
13 years 10 months ago
Parallel Embedded Systems: Where Real-Time and Low-Power Meet
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...
Zdravko Karakehayov, Yu Guo
RTAS
2006
IEEE
14 years 2 months ago
Adaptive Allocation of Software and Hardware Real-Time Tasks for FPGA-based Embedded Systems
Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a recon...
Rodolfo Pellizzoni, Marco Caccamo
IPPS
2010
IEEE
13 years 6 months ago
On the parallelisation of MCMC by speculative chain execution
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...
DAC
2006
ACM
14 years 9 months ago
A real time budgeting method for module-level-pipelined bus based system using bus scenarios
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
Tadaaki Tanimoto, Seiji Yamaguchi, Akio Nakata, Te...
HPCA
2003
IEEE
14 years 9 months ago
Variability in Architectural Simulations of Multi-Threaded Workloads
Multi-threaded commercial workloads implement many important internet services. Consequently, these workloads are increasingly used to evaluate the performance of uniprocessor and...
Alaa R. Alameldeen, David A. Wood