239 search results - page 33 / 48 » An Architecture for Kernel-Level Verification of Executables... |
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Cellular automata can be used to design high-performance natural solvers on parallel computers. This paper describes the development of applications using CARPET, a high-level prog...
NIPS
1998
13 years 10 months ago
1998
The execution order of a block of computer instructions can make a difference in its running time by a factor of two or more. In order to achieve the best possible speed, compiler...
VEE
2012
ACM
12 years 4 months ago
2012
ACM
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
DSRT
2005
IEEE
14 years 2 months ago
2005
IEEE
Engine production is a complex process that requires the manufacturing and assembly of a wide variety of components to create a varied product mix. Simulation plays a key role in ...