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PLDI
1995
ACM
14 years 1 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
SKG
2005
IEEE
14 years 3 months ago
An Agent-based Peer-to-Peer Grid Computing Architecture
The conventional computing Grid has developed a service oriented computing architecture with a superlocal resource management and scheduling strategy. This architecture is limited...
Jia Tang, Minjie Zhang
ICASSP
2011
IEEE
13 years 1 months ago
A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder wit...
Jia-Wei Liang, He-Yuan Lin, Gwo Giun Lee
TROB
2002
120views more  TROB 2002»
13 years 9 months ago
DPAC: an object-oriented distributed and parallel computing framework for manufacturing applications
Parallel and distributed computing infrastructure are increasingly being embraced in the context of manufacturing applications, including real-time scheduling. In this paper, we pr...
N. R. Srinivasa Raghavan, Tanmay Waghmare
ICPR
2004
IEEE
14 years 11 months ago
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
Jie Han, Pieter Jonker