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» An Architecture for Problem Solving with Diagrams
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DAC
2006
ACM
14 years 9 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
HPCA
2006
IEEE
14 years 9 months ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
SIGMOD
2008
ACM
98views Database» more  SIGMOD 2008»
14 years 8 months ago
Damia: data mashups for intranet applications
Increasingly large numbers of situational applications are being created by enterprise business users as a by-product of solving day-to-day problems. In efforts to address the dem...
David E. Simmen, Mehmet Altinel, Volker Markl, Sri...
PLDI
2009
ACM
14 years 3 months ago
PetaBricks: a language and compiler for algorithmic choice
It is often impossible to obtain a one-size-fits-all solution for high performance algorithms when considering different choices for data distributions, parallelism, transformati...
Jason Ansel, Cy P. Chan, Yee Lok Wong, Marek Olsze...
FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
14 years 2 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich