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ACSD
2009
IEEE
100views Hardware» more  ACSD 2009»
14 years 2 months ago
Scheduling Synchronous Elastic Designs
Asynchronous and latency-insensitive circuits offer a similar form of elasticity that tolerates variations in the delays of communication resources of a system. This flexibility ...
Josep Carmona, Jorge Júlvez, Jordi Cortadel...
ICCD
2007
IEEE
215views Hardware» more  ICCD 2007»
14 years 4 months ago
A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...
Amit Kumar 0002, Partha Kundu, Arvind P. Singh, Li...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 4 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein
NOCS
2008
IEEE
14 years 1 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
CDC
2008
IEEE
128views Control Systems» more  CDC 2008»
14 years 1 months ago
Time-robust discrete control over networked Loosely Time-Triggered Architectures
In this paper we consider Loosely Time-Triggered Architectures (LTTA) as a networked infrastructure for deploying discrete control. LTTA are distributed architectures in which 1/ ...
Paul Caspi, Albert Benveniste