17 search results - page 2 / 4 » An Efficient Hardware Architecture for H.264 Adaptive Debloc... |
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...
ASAP
2006
IEEE
13 years 9 months ago
2006
IEEE
This paper discusses hardware development of a realtime H.264/AVC video decoder. Synthesis results are presented for example implementations of the inverse quantization, inverse t...
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
— In this paper an analysis of bi-dimensional video filtering on the Cell Broadband Engine Processor is presented. To evaluate the processor, a highly adaptive filtering algori...
ICIP
2007
IEEE
2007
IEEE
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
14 years 9 months ago
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...