697 search results - page 6 / 140 » An Efficient Hardware Support for Control Data Validation |
FPL
2010
Springer
13 years 5 months ago
2010
Springer
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
EUROMICRO
2002
IEEE
14 years 13 days ago
2002
IEEE
1 Product line engineering is usually a very beneficial, but sometimes also a very risky endeavor, as there is no guarantee for economic success. In this paper, we will describe an...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—The present work describes the analysis, modeling and control of a transformerless Boost-Buck power inverter used as a DC-AC power conditioning stage for grid-connected photovol...
IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
14 years 2 months ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...