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» An Efficient Hardware Support for Control Data Validation
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DGO
2007
150views Education» more  DGO 2007»
13 years 9 months ago
Event-triggered data and knowledge sharing among collaborating government organizations
Solving complex global problems such as illegal immigration, border control, and terrorism requires government organizations at all levels to share not only data but, more importa...
Seema Degwekar, Jeff DePree, Howard W. Beck, Carla...
MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
13 years 12 months ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...
FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 9 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
SIGCOMM
2010
ACM
13 years 8 months ago
An open router virtualization framework using a programmable forwarding plane
Network virtualization promises to spur innovation and add flexibility to the Future Internet infrastructure. Routers supporting virtualization allow the deployment of concurrent ...
Zdravko Bozakov
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 5 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi