76 search results - page 11 / 16 » An Elementary Processor Architecture with Simultaneous Instr... |
EUROPAR
2007
Springer
14 years 1 months ago
2007
Springer
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
ARCS
2006
Springer
13 years 11 months ago
2006
Springer
While trace cache, value prediction, and prefetching have been shown to be effective in the single-threaded superscalar, there has been no analysis of these techniques in a Simulta...
IWOMP
2007
Springer
14 years 1 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
IISWC
2008
IEEE
14 years 1 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...