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IESS
2007
Springer
120views Hardware» more  IESS 2007»
14 years 1 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
CHI
2004
ACM
14 years 29 days ago
Topobo: a constructive assembly system with kinetic memory
We introduce Topobo, a 3D constructive assembly system embedded with kinetic memory, the ability to record and playback physical motion. Unique among modeling systems is Topoboʼs...
Hayes Raffle, Amanda J. Parkes, Hiroshi Ishii
DAC
2004
ACM
14 years 8 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
ICDCS
2007
IEEE
14 years 1 months ago
Stabilizing Peer-to-Peer Spatial Filters
In this paper, we propose and prove correct a distributed stabilizing implementation of an overlay, called DR-tree, optimized for efficient selective dissemination of information...
Silvia Bianchi, Ajoy Kumar Datta, Pascal Felber, M...
MOBISYS
2008
ACM
13 years 9 months ago
MobiVMM: a virtual machine monitor for mobile phones
Mobile phones have evolved into complex systems as they have more and more new applications built-in. As a result, they are less reliable and less secure than before. Virtual Mach...
See-hwan Yoo, Yunxin Liu, Cheol-Ho Hong, Chuck Yoo...