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TEC
2002
119views more  TEC 2002»
13 years 6 months ago
Graph-based evolutionary design of arithmetic circuits
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshik...
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
13 years 11 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn
FPGA
2008
ACM
184views FPGA» more  FPGA 2008»
13 years 8 months ago
Mapping for better than worst-case delays in LUT-based FPGA designs
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
Kirill Minkovich, Jason Cong
BCS
2008
13 years 8 months ago
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation
This paper describes our approaches to raise the level of abstraction at which hardware suitable for accelerating computationally-intensive applications can be specified. Field-Pr...
Qiang Liu, George A. Constantinides, Konstantinos ...
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
13 years 12 months ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon