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TSE
2010
197views more  TSE 2010»
13 years 2 months ago
A Genetic Algorithm-Based Stress Test Requirements Generator Tool and Its Empirical Evaluation
Genetic algorithms (GAs) have been applied previously to UML-driven, stress test requirements generation with the aim of increasing chances of discovering faults relating to networ...
Vahid Garousi
GECCO
2010
Springer
196views Optimization» more  GECCO 2010»
14 years 13 days ago
Using synthetic test suites to empirically compare search-based and greedy prioritizers
The increase in the complexity of modern software has led to the commensurate growth in the size and execution time of the test suites for these programs. In order to address this...
Zachary D. Williams, Gregory M. Kapfhammer
HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
ECBS
2007
IEEE
119views Hardware» more  ECBS 2007»
14 years 1 months ago
IPOG: A General Strategy for T-Way Software Testing
Most existing work on t-way testing has focused on 2-way (or pairwise) testing, which aims to detect faults caused by interactions between any two parameters. However, faults can ...
Yu Lei, Raghu Kacker, D. Richard Kuhn, Vadim Okun,...
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 2 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand