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DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
ICS
1999
Tsinghua U.
14 years 26 days ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
IJCAI
2007
13 years 10 months ago
2007
Time series data abounds in real world problems. Measuring the similarity of time series is a key to solving these problems. One state of the art measure is the longest common sub...
GECCO
2008
Springer
13 years 9 months ago
2008
Springer
Gene regulatory networks (GRNs) are complex control systems that govern the interaction of genes, which ultimately control cellular processes at the protein level. GRNs can be ted...