260 search results - page 17 / 52 » An FPGA Implemented Processor Architecture with Adaptive Res... |
DDECS
2008
IEEE
13 years 9 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
CSREAESA
2006
13 years 9 months ago
2006
SoPC (System on a Programmable Chip) is one important kind of SoC solution based on PLD (Programmable Logic Device). At the same time, PBD (Platform-based Design) has become popul...
Publication
_2011.jpg "NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision")
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
FCCM
2009
IEEE
13 years 5 months ago
2009
IEEE
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...