Sciweavers

2715 search results - page 514 / 543
» An Implementation of Narrowing Strategies
Sort
View
ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
13 years 12 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
CGO
2010
IEEE
13 years 12 months ago
An efficient software transactional memory using commit-time invalidation
To improve the performance of transactional memory (TM), researchers have found many eager and lazy optimizations for conflict detection, the process of determining if transaction...
Justin Emile Gottschlich, Manish Vachharajani, Jer...
EH
1999
IEEE
351views Hardware» more  EH 1999»
13 years 12 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
SIBGRAPI
1999
IEEE
13 years 12 months ago
Parallelizing MPEG Video Encoding using Multiprocessors
Many computer applications are currently using digital video. Recent advances in digital imaging and faster networking infrastructure made this technology very popular, not only fo...
Joao Paulo Kitajima, Denilson Barbosa, Wagner Meir...
VLDB
1999
ACM
140views Database» more  VLDB 1999»
13 years 12 months ago
Distributed Hypertext Resource Discovery Through Examples
We describe the architecture of a hypertext resource discovery system using a relational database. Such a system can answer questions that combine page contents, metadata, and hyp...
Soumen Chakrabarti, Martin van den Berg, Byron Dom