5 search results - page 1 / 1 » An Implicit Approach to Minimizing Range-Equivalent Circuits |
TCAD
2008
13 years 7 months ago
2008
Abstract--Simplifying a combinational circuit while preserving its range has a variety of applications, such as combinational equivalence checking and random simulation. Previous a...
ASYNC
1998
IEEE
13 years 12 months ago
1998
IEEE
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
In a CMOS combinational logic circuit, the subthreshold leakage current in the standby state depends on the state of the inputs. In this paper we present a new approach to identif...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
SLIP
2003
ACM
14 years 26 days ago
2003
ACM
In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...