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» An Input Output HMM Architecture
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ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
14 years 20 days ago
Architectures for function evaluation on FPGAs
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
MJ
2008
72views more  MJ 2008»
13 years 7 months ago
Cell architecture for nanoelectronic design
Several nanoelectronic devices have been already proved. However, no architecture which makes use of them provides a feasible opportunity to build medium/large systems. Nanoarchit...
Ferran Martorell, Antonio Rubio
ESANN
2004
13 years 8 months ago
Dynamic functional-link neural networks genetically evolved applied to system identification
: The contribution concerns the design of a generalised functional-link neural network with internal dynamics and its applicability to system identification by means of multi-input...
Teodor Marcu, Birgit Köppen-Seliger
SBRN
1998
IEEE
13 years 11 months ago
A Neural Architecture for the Identification of Number Sequences
This paper describes an architecture based on spatiotemporal networks that identifies sequences of numbers. This architecture incorporates an input layer that transforms (by means...
Juan Moreno García, Gabriel Sebastiá...
ISLPED
1996
ACM
81views Hardware» more  ISLPED 1996»
13 years 11 months ago
Simulation based architectural power estimation for PLA-based controllers
We present an architectural power simulation technique for PLA-based controllers. The contributions of this work are (1) a simple but ecient power characterization of PLAs; and (2...
Srinivas Katkoori, Ranga Vemuri