This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
Several nanoelectronic devices have been already proved. However, no architecture which makes use of them provides a feasible opportunity to build medium/large systems. Nanoarchit...
: The contribution concerns the design of a generalised functional-link neural network with internal dynamics and its applicability to system identification by means of multi-input...
This paper describes an architecture based on spatiotemporal networks that identifies sequences of numbers. This architecture incorporates an input layer that transforms (by means...
We present an architectural power simulation technique for PLA-based controllers. The contributions of this work are (1) a simple but ecient power characterization of PLAs; and (2...