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» An Input Output HMM Architecture
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INFOCOM
2008
IEEE
14 years 4 months ago
A Three-Stage Load-Balancing Switch
—Recently there has been a great deal of interest in load-balancing switches due to their simple architecture and high bandwidth. In this paper we propose a three-stage loadbalan...
Xiaolin Wang, Yan Cai, Sheng Xiao, Weibo Gong
TSD
2010
Springer
13 years 7 months ago
Hybrid HMM/BLSTM-RNN for Robust Speech Recognition
The question how to integrate information from different sources in speech decoding is still only partially solved (layered architecture versus integrated search). We investigate t...
Yang Sun, Louis ten Bosch, Lou Boves
ISIM
2007
13 years 11 months ago
Software Architectures for Real-time Embedded Applications for Broadcasting
The paper discusses a choice of appropriate software architecture with regards to the specifications of embedded applications as information systems particularly used in area of ra...
Otto Zeleznik, Zdenek Havlice
ISCAS
2003
IEEE
91views Hardware» more  ISCAS 2003»
14 years 3 months ago
Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity
The full-custom CMOS realization of a new modular sorting architecture is presented. The high-performance architecture is based on rank ordering, and on efficient implementation o...
Turan Demirci, Ilhan Hatirnaz, Yusuf Leblebici
ASAP
2010
IEEE
193views Hardware» more  ASAP 2010»
13 years 11 months ago
Automatic generation of polynomial-based hardware architectures for function evaluation
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca