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175
Voted
DFT
2006
IEEE
16 years 5 days ago
2006
IEEE
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
154
Voted
ITC
2003
IEEE
15 years 11 months ago
2003
IEEE
As the performance of Analog-to-Digital Converters continues to improve, it is becoming more challenging and costly to develop sufficiently fast and low-drift signal generators th...
134
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ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
158
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RT
2001
Springer
15 years 10 months ago
2001
Springer
Abstract. We present a new data structure for encoding the appearance of a geometric model as seen from a viewing region (view cell). This representation can be used in interactive...
160
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IEEEPACT
2000
IEEE
15 years 10 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...