60 search results - page 4 / 12 » An Issue Logic for Superscalar Microprocessors |
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
DFT
2007
IEEE
14 years 1 months ago
2007
IEEE
We propose and evaluate the use of lazy error detection for a superscalar, out-of-order microprocessor’s functional units. The key insight is that error detection is off the cri...
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
ASPLOS
1996
ACM
13 years 11 months ago
1996
ACM
Advances in IC processing allow for more microprocessor design options. The increasing gate density and cost of wires in advanced integrated circuit technologies require that we l...
ISSS
2002
IEEE
14 years 9 days ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...