60 search results - page 9 / 12 » An Issue Logic for Superscalar Microprocessors |
ISLPED
2003
ACM
14 years 19 days ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
ITC
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
EUROPAR
2005
Springer
14 years 27 days ago
2005
Springer
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Designing high-performance low-power register files is of critical importance to the continuation of current performance advances in wide-issue and deeply-pipelined superscalar m...