Sciweavers

2682 search results - page 463 / 537
» An Iterative-Cyclic Software Process Model
Sort
View
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 3 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
DSN
2006
IEEE
14 years 3 months ago
Assessment of the Effect of Memory Page Retirement on System RAS Against Hardware Faults
The Solaris 10 Operating System includes a number of new features for predictive self-healing. One such feature is the ability of the Fault Management software to diagnose memory ...
Dong Tang, Peter Carruthers, Zuheir Totari, Michae...
IPPS
2006
IEEE
14 years 3 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
14 years 3 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...
SIPS
2006
IEEE
14 years 3 months ago
Configuration and Representation of Large-Scale Dataflow Graphs using the Dataflow Interchange Format
—A wide variety of DSP design tools have been developed that incorporate dataflow graph representations into their GUI-based design environments. However, as the complexity of ap...
Ivan Corretjer, Chia-Jui Hsu, Shuvra S. Bhattachar...