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» An O(nlogn) time algorithm for optimal buffer insertion
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SECON
2008
IEEE
14 years 1 months ago
Optimal Buffer Management Policies for Delay Tolerant Networks
—Delay Tolerant Networks are wireless networks where disconnections may occur frequently due to propagation phenomena, node mobility, and power outages. Propagation delays may al...
Amir Krifa, Chadi Barakat, Thrasyvoulos Spyropoulo...
DAC
1999
ACM
14 years 8 months ago
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
Chung-Ping Chen, Noel Menezes
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
14 years 1 months ago
Transition time bounded low-power clock tree construction
— Recently power becomes a significant issue in clock network design for high-performance ICs because the clock network consumes a large portion of the total power in the whole s...
Min Pan, Chris C. N. Chu, J. Morris Chang
GLOBECOM
2006
IEEE
14 years 1 months ago
Predictive Buffering for Multi-Source Video Streaming over the Internet
—The current best-effort Internet does not guarantee the bandwidth availability between a receiver and a sender, and so renders any quality-of-service (QoS) control difficult, if...
P. Y. Ho, Jack Y. B. Lee
DAC
2006
ACM
14 years 1 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...