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ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 1 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
DEBS
2010
ACM
14 years 21 days ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
BMCBI
2008
195views more  BMCBI 2008»
13 years 9 months ago
Goldsurfer2 (Gs2): A comprehensive tool for the analysis and visualization of genome wide association studies
Background: Genome wide association (GWA) studies are now being widely undertaken aiming to find the link between genetic variations and common diseases. Ideally, a well-powered G...
Fredrik Pettersson, Andrew P. Morris, Michael R. B...
BMCBI
2008
122views more  BMCBI 2008»
13 years 9 months ago
High-throughput bioinformatics with the Cyrille2 pipeline system
Background: Modern omics research involves the application of high-throughput technologies that generate vast volumes of data. These data need to be pre-processed, analyzed and in...
Mark W. E. J. Fiers, Ate van der Burgt, Erwin Date...
TVLSI
2008
139views more  TVLSI 2008»
13 years 8 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood