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» An Optical Simulation of Shared Memory
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INFOCOM
2010
IEEE
13 years 5 months ago
Enabling a Bufferless Core Network Using Edge-to-Edge Packet-Level FEC
— Internet traffic is expected to grow phenomenally over the next five to ten years, and to cope with such large traffic volumes, core networks are expected to scale to capaci...
Arun Vishwanath, Vijay Sivaraman, Marina Thottan, ...
IPPS
2003
IEEE
14 years 20 days ago
Extending OpenMP to Support Slipstream Execution Mode
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...
Khaled Z. Ibrahim, Gregory T. Byrd
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
13 years 11 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
STOC
2003
ACM
188views Algorithms» more  STOC 2003»
14 years 7 months ago
Almost random graphs with simple hash functions
We describe a simple randomized construction for generating pairs of hash functions h1, h2 from a universe U to ranges V = [m] = {0, 1, . . . , m - 1} and W = [m] so that for ever...
Martin Dietzfelbinger, Philipp Woelfel