This paper presents a method for synthesizing lookup table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many deco...
Synthesis of finite-state machines from linear-time temporal logic (LTL) formulas is an important formal specification debugging technique for reactive systems and can quickly ge...
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Initial results have been achieved for automatic synthesis of MEMS system-level lumped parameter models using genetic programming and bond graphs. This paper first discusses the ne...
Zhun Fan, Kisung Seo, Jianjun Hu, Ronald C. Rosenb...