Sciweavers

764 search results - page 123 / 153
» An e-contracting reference architecture
Sort
View
VLSID
2001
IEEE
132views VLSI» more  VLSID 2001»
14 years 10 months ago
Accurate Power Macro-modeling Techniques for Complex RTL Circuits
This paper presents novel techniques for the cycle-accurate power macro-modeling of complex RTL components. The proposed techniques are based on the observation that RTL component...
Nachiketh R. Potlapally, Michael S. Hsiao, Anand R...
ICSE
2007
IEEE-ACM
14 years 10 months ago
The Role of Experience and Ability in Comprehension Tasks Supported by UML Stereotypes
Proponents of design notations tailored for specific application domains or reference architectures, often available in the form of UML stereotypes, motivate them by improved unde...
Filippo Ricca, Massimiliano Di Penta, Marco Torchi...
GLOBECOM
2009
IEEE
14 years 4 months ago
Building Femtocell More Secure with Improved Proxy Signature
—Demand for the femtocell is largely credited to the surge in a more always best connected communication conscious public. 3GPP define new architecture and security requirement f...
Chan-Kyu Han, Hyoung-Kee Choi, In-Hwan Kim
IEEEPACT
2009
IEEE
14 years 4 months ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
IISWC
2009
IEEE
14 years 4 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee