75 search results - page 12 / 15 » An efficient approach to simultaneous transistor and interco... |
HPCA
2005
IEEE
14 years 9 months ago
2005
IEEE
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
BWCCA
2010
13 years 4 months ago
2010
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
AAAI
2006
13 years 10 months ago
2006
We present a novel framework for multi-label learning that explicitly addresses the challenge arising from the large number of classes and a small size of training data. The key a...
ASPDAC
2007
ACM
14 years 29 days ago
2007
ACM
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
RECOSOC
2007
13 years 10 months ago
2007
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...