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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 2 months ago
Retargetable Code Optimization for Predicated Execution
Retargetable C compilers are key components of today’s embedded processor design platforms for quickly obtaining compiler support and performing early processor architecture exp...
Manuel Hohenauer, Felix Engel, Rainer Leupers, Ger...
VLSID
2005
IEEE
129views VLSI» more  VLSID 2005»
14 years 8 months ago
A RISC Hardware Platform for Low Power Java
Java is increasingly being used as a language and binary format for low power, embedded systems. Current software only approaches to Java execution do not always suit the type of ...
Paul Capewell, Ian Watson
DATE
2010
IEEE
197views Hardware» more  DATE 2010»
13 years 2 months ago
Compilation of stream programs for multicore processors that incorporate scratchpad memories
The stream processing characteristics of many embedded system applications in multimedia and networking domains have led to the advent of stream based programming formats. Several ...
Weijia Che, Amrit Panda, Karam S. Chatha
SIGPLAN
2008
13 years 7 months ago
An aspect-oriented approach to the undergraduate programming language curriculum
Three key forces are shaping the modern Computer Science (CS) curriculum: (1) new topics/courses are squeezing out existing ones; (2) a focus on "big picture" and interd...
Mark A. Sheldon, Franklyn A. Turbak