Sciweavers

290 search results - page 51 / 58
» An embedded language approach to teaching hardware compilati...
Sort
View
CGO
2010
IEEE
14 years 2 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
DAC
2007
ACM
14 years 8 months ago
Implicitly Parallel Programming Models for Thousand-Core Microprocessors
This paper argues for an implicitly parallel programming model for many-core microprocessors, and provides initial technical approaches towards this goal. In an implicitly paralle...
Wen-mei W. Hwu, Shane Ryoo, Sain-Zee Ueng, John H....
MICRO
2007
IEEE
133views Hardware» more  MICRO 2007»
14 years 2 months ago
Revisiting the Sequential Programming Model for Multi-Core
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
Matthew J. Bridges, Neil Vachharajani, Yun Zhang, ...
ASPLOS
2011
ACM
12 years 11 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...
VL
1997
IEEE
198views Visual Languages» more  VL 1997»
14 years 1 days ago
Behavior Processors: Layers between End-Users and Java Virtual Machines
Visual programming approaches are limited in their usefulness if they do not include a profile of their users that defines exactly who is attempting to solve what kind of problems...
Alexander Repenning, Andri Ioannidou