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» An improvement in formal verification
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ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 6 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
14 years 2 months ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton
IEE
2008
117views more  IEE 2008»
13 years 9 months ago
Formal verification of systems with an unlimited number of components
1 2 3 In many real component-based systems and patterns of component interaction, there can be identified a stable part (like control component, server, instance handler) and a nu...
Pavlína Vareková, Barbora Zimmerova,...
HYBRID
1998
Springer
14 years 2 months ago
Formal Verification of Safety-Critical Hybrid Systems
This paper investigates how formal techniques can be used for the analysis and verification of hybrid systems [1,5,7,16] -- systems involving both discrete and continuous behavior....
Carolos Livadas, Nancy A. Lynch
RTS
2008
131views more  RTS 2008»
13 years 9 months ago
Formal verification of multitasking applications based on timed automata model
The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. Th...
Libor Waszniowski, Zdenek Hanzálek