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» An improvement in formal verification
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ICCD
1996
IEEE
83views Hardware» more  ICCD 1996»
14 years 2 months ago
The use of random simulation in formal verification
Florian Krohm, Andreas Kuehlmann, Arjen Mets
KES
1997
Springer
14 years 2 months ago
Formal verification of the correctness in hybrid expert systems
Simon C. K. Shiu, James N. K. Liu, Daniel S. Yeung
EURODAC
1994
IEEE
159views VHDL» more  EURODAC 1994»
14 years 2 months ago
Formal verification of behavioral VHDL specifications: a case study
Felix Nicoli, Laurence Pierre
ICCAD
1994
IEEE
70views Hardware» more  ICCAD 1994»
14 years 2 months ago
Iterative algorithms for formal verification of embedded real-time systems
Felice Balarin, Alberto L. Sangiovanni-Vincentelli
CAV
1990
Springer
114views Hardware» more  CAV 1990»
14 years 2 months ago
Formal Verification of Digital Circuits Using Symbolic Ternary System Models
Ternary system modeling involves extending the traditional set of binary values
Randal E. Bryant, Carl-Johan H. Seger