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2488
search results - page 48 / 498
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An improvement in formal verification
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ICCD
1996
IEEE
83
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Hardware
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ICCD 1996
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The use of random simulation in formal verification
14 years 2 months ago
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www.cadence.com
Florian Krohm, Andreas Kuehlmann, Arjen Mets
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34
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KES
1997
Springer
111
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Information Technology
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KES 1997
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Formal verification of the correctness in hybrid expert systems
14 years 2 months ago
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www4.comp.polyu.edu.hk
Simon C. K. Shiu, James N. K. Liu, Daniel S. Yeung
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35
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EURODAC
1994
IEEE
159
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VHDL
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EURODAC 1994
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Formal verification of behavioral VHDL specifications: a case study
14 years 2 months ago
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www.cecs.uci.edu
Felix Nicoli, Laurence Pierre
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ICCAD
1994
IEEE
70
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Hardware
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ICCAD 1994
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Iterative algorithms for formal verification of embedded real-time systems
14 years 2 months ago
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www.cs.york.ac.uk
Felice Balarin, Alberto L. Sangiovanni-Vincentelli
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31
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CAV
1990
Springer
114
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Hardware
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CAV 1990
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Formal Verification of Digital Circuits Using Symbolic Ternary System Models
14 years 2 months ago
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www.cs.cmu.edu
Ternary system modeling involves extending the traditional set of binary values
Randal E. Bryant, Carl-Johan H. Seger
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