Sciweavers

73 search results - page 11 / 15
» An instruction-level energy model for embedded VLIW architec...
Sort
View
ISCAPDCS
2008
13 years 9 months ago
Parallel Embedded Systems: Where Real-Time and Low-Power Meet
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...
Zdravko Karakehayov, Yu Guo
CASES
2006
ACM
13 years 11 months ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi
DAC
2008
ACM
14 years 8 months ago
Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems
Embedded systems with heterogeneous processors extend the energy/timing trade-off flexibility and provide the opportunity to fine tune resource utilization for particular applicat...
Michel Goraczko, Jie Liu, Dimitrios Lymberopoulos,...
SAMOS
2004
Springer
14 years 27 days ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
HIPEAC
2005
Springer
14 years 1 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli