Sciweavers

73 search results - page 6 / 15
» An instruction-level energy model for embedded VLIW architec...
Sort
View
RTCSA
2005
IEEE
14 years 1 months ago
Run-Time Power Consumption Modeling for Embedded Multimedia Systems
The run-time power consumption model for multimedia application routines in an embedded system is developed in this work. A wide range of benchmarks for these routines such as ima...
Yu Hu, Qing Li, C. C. Jay Kuo
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 14 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
APCSAC
2001
IEEE
13 years 11 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
SIGOPSE
1998
ACM
13 years 11 months ago
MMLite: a highly componentized system architecture
MMLite is a modular system architecture that is suitable for a wide variety of hardware and applications. The system provides a selection of object-based components that are dynam...
Johannes Helander, Alessandro Forin
ICCD
2002
IEEE
141views Hardware» more  ICCD 2002»
14 years 4 months ago
Embedded Operating System Energy Analysis and Macro-Modeling
A large and increasing number of modern embedded systems are subject to tight power/energy constraints. It has been demonstrated that the operating system (OS) can have a signifi...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha