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MICRO
2000
IEEE
86views Hardware» more  MICRO 2000»
13 years 12 months ago
On pipelining dynamic instruction scheduling logic
A machine’s performance is the product of its IPC (Instructions Per Cycle) and clock frequency. Recently, Palacharla, Jouppi, and Smith [3] warned that the dynamic instruction s...
Jared Stark, Mary D. Brown, Yale N. Patt
VLSID
2001
IEEE
117views VLSI» more  VLSID 2001»
14 years 7 months ago
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
Abstract - An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency...
Amit Sinha, Anantha Chandrakasan
VLSID
2008
IEEE
120views VLSI» more  VLSID 2008»
14 years 7 months ago
Continuous Frequency Adjustment Technique Based on Dynamic Workload Prediction
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
Hwisung Jung, Massoud Pedram
APSEC
2002
IEEE
14 years 14 days ago
Using Process Simulation to Compare Scheduling Strategies for Software Projects
We present a discrete simulation model for software projects which explicitly takes a scheduling strategy as input. The model represents varying staff skill levels, component coup...
Frank Padberg
JEI
2006
128views more  JEI 2006»
13 years 7 months ago
Performance study of common image steganography and steganalysis techniques
Abstract. We investigate the performance of state of the art universal steganalyzers proposed in the literature. These universal steganalyzers are tested against a number of well-k...
Mehdi Kharrazi, Husrev T. Sencar, Nasir D. Memon