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» An optimal architecture for a DDC
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DATE
2010
IEEE
157views Hardware» more  DATE 2010»
14 years 13 hour ago
RMOT: Recursion in model order for task execution time estimation in a software pipeline
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
Nabeel Iqbal, M. A. Siddique, Jörg Henkel
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 7 hour ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
IWOMP
2010
Springer
13 years 11 months ago
A ROSE-Based OpenMP 3.0 Research Compiler Supporting Multiple Runtime Libraries
OpenMP is a popular and evolving programming model for shared-memory platforms. It relies on compilers to target modern hardware architectures for optimal performance. A variety of...
Chunhua Liao, Daniel J. Quinlan, Thomas Panas, Bro...
MSWIM
2009
ACM
13 years 11 months ago
Modeling and performance evaluation of transmission control protocol over cognitive radio ad hoc networks
Cognitive Radio (CR) technology constitutes a new paradigm to provide additional spectrum utilization opportunities in wireless ad hoc networks. Recent research in this field has ...
Marco Di Felice, Kaushik Roy Chowdhury, Luciano Bo...
SIGMETRICS
2000
ACM
177views Hardware» more  SIGMETRICS 2000»
13 years 11 months ago
A case for end system multicast
— The conventional wisdom has been that IP is the natural protocol layer for implementing multicast related functionality. However, more than a decade after its initial proposal,...
Yang-Hua Chu, Sanjay G. Rao, Hui Zhang