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MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
14 years 1 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...
GECCO
2008
Springer
199views Optimization» more  GECCO 2008»
13 years 8 months ago
Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems
New multimedia embedded applications are increasingly dynamic, and rely on Dynamically-allocated Data Types (DDTs) to store their data. The optimization of DDTs for each target em...
José Ignacio Hidalgo, José L. Risco-...
RT
2001
Springer
14 years 4 days ago
A Perceptually-Based Texture Caching Algorithm for Hardware-Based Rendering
: The performance of hardware-based interactive rendering systems is often constrained by polygon fill rates and texture map capacity, rather than polygon count alone. We present a...
Reynald Dumont, Fabio Pellacini, James A. Ferwerda
DATE
2000
IEEE
101views Hardware» more  DATE 2000»
14 years 4 days ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...
RTSS
1992
IEEE
13 years 11 months ago
Allocation of periodic task modules with precedence and deadline constraints in distributed real-time systems
This paper addresses the problem of allocating (assigning and scheduling) periodic task modules to processing nodes in distributed real-time systems subject to task precedence and ...
Chao-Ju Hou, Kang G. Shin