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114
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FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
15 years 7 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
137
Voted
CHI
1996
ACM
15 years 7 months ago
Silk from a Sow's Ear: Extracting Usable Structures from the Web
In its current implementation, the World-Wide Web lacks much of the explicit structure and strong typing found in many closed hypertext systems. While this property has directly f...
Peter Pirolli, James E. Pitkow, Ramana Rao
113
Voted
DAC
1996
ACM
15 years 7 months ago
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
Guido Araujo, Sharad Malik, Mike Tien-Chien Lee
112
Voted
STOC
1996
ACM
92views Algorithms» more  STOC 1996»
15 years 7 months ago
Constructing Evolutionary Trees in the Presence of Polymorphic Characters
Abstract. Most phylogenetics literature and construction methods based upon characters presume monomorphism (one state per character per species), yet polymorphism (multiple states...
Maria Luisa Bonet, Cynthia A. Phillips, Tandy Warn...
125
Voted
ICPP
1994
IEEE
15 years 7 months ago
A New Approach to Scheduling Parallel Programs Using Task Duplication
1 In this paper, we explore the problem of scheduling parallel programs using task duplication for messagepassing multicomputers. Task duplication means scheduling a parallel progr...
Ishfaq Ahmad, Yu-Kwong Kwok
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