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MOBICOM
2012
ACM
11 years 10 months ago
MIDU: enabling MIMO full duplex
Given that full duplex (FD) and MIMO both employ multiple antenna resources, an important question that arises is how to make the choice between MIMO and FD? We show that optimal ...
Ehsan Aryafar, Mohammad Ali Khojastepour, Karthike...
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 4 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
14 years 4 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
BMCBI
2006
120views more  BMCBI 2006»
13 years 7 months ago
Projections for fast protein structure retrieval
Background: In recent times, there has been an exponential rise in the number of protein structures in databases e.g. PDB. So, design of fast algorithms capable of querying such d...
Sourangshu Bhattacharya, Chiranjib Bhattacharyya, ...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 20 days ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...