Sciweavers

103 search results - page 4 / 21
» Analysis and Hardware Architecture Design of Global Motion E...
Sort
View
ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
14 years 1 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli
ICIP
2007
IEEE
14 years 3 months ago
Rate-Distortion Analysis and Bit Allocation Strategy for Motion Estimation at the Decoder using Maximum Likelihood Technique in
Numerous approaches for distributed video coding have been recently proposed. One of main motivations for these techniques is the possibility of achieving complexity tradeoffs bet...
Ivy H. Tseng, Antonio Ortega
TCSV
2002
119views more  TCSV 2002»
13 years 8 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...
TCOS
2010
13 years 3 months ago
PET SNAKE: A Special Purpose Architecture to Implement an Algebraic Attack in Hardware
Abstract. In [24] Raddum and Semaev propose a technique to solve systems of polynomial equations over F2 as occurring in algebraic attacks on block ciphers. This approach is known ...
Willi Geiselmann, Kenneth Matheis, Rainer Steinwan...
CODES
2003
IEEE
14 years 2 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha