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CODES
2006
IEEE
14 years 1 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
CASES
2007
ACM
13 years 12 months ago
Performance optimal processor throttling under thermal constraints
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
Ravishankar Rao, Sarma B. K. Vrudhula
SPAA
2010
ACM
13 years 8 months ago
Scheduling to minimize power consumption using submodular functions
We develop logarithmic approximation algorithms for extremely general formulations of multiprocessor multiinterval offline task scheduling to minimize power usage. Here each proce...
Erik D. Demaine, Morteza Zadimoghaddam
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
12 years 8 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...
IPPS
2008
IEEE
14 years 2 months ago
SNAP, Small-world Network Analysis and Partitioning: An open-source parallel graph framework for the exploration of large-scale
We present SNAP (Small-world Network Analysis and Partitioning), an open-source graph framework for exploratory study and partitioning of large-scale networks. To illustrate the c...
David A. Bader, Kamesh Madduri