In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
PSP and the backward propagation of variance (BPV) method are used to characterize the statistical variations of metal-oxide-semiconductor field effect transistors (MOSFETs). BPV s...
Xin Li, Colin C. McAndrew, Weimin Wu, Samir Chaudh...
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...