562 search results - page 29 / 113 » Analysis of Hardware Acceleration in Reconfigurable Embedded... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
SIPS
2007
IEEE
14 years 2 months ago
2007
IEEE
OFDM demodulation under fast fading radio channels is very computationally demanding, making the implementation of Software Defined Radio (SDR) solutions problematic. A suboptima...
PAIRING
2010
Springer
13 years 6 months ago
2010
Springer
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...