657 search results - page 19 / 132 » Analysis of Multithreaded Architectures for Parallel Computi... |
CATA
2004
13 years 9 months ago
2004
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
ICPP
1994
IEEE
13 years 11 months ago
1994
IEEE
Recently, the mesh connected trees (MCT) network has been proposed as a possible architecture for parallel computers. MCT networks are obtained by combining complete binary trees ...
ICMCS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
HPCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Chip Multi-Threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways, including Simultaneous Multithreading (SMT) and Chip Mult...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
PM-PVM is a portable implementation of PVM designed to work on SMP architectures supporting multithreading. PM-PVM portability is achieved through the implementation of the PVM fu...