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» Analysis of path exclusion at the machine code level
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MICRO
2005
IEEE
123views Hardware» more  MICRO 2005»
14 years 5 days ago
A Criticality Analysis of Clustering in Superscalar Processors
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
Pierre Salverda, Craig B. Zilles
IEEEPACT
1999
IEEE
13 years 11 months ago
Predicated Static Single Assignment
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
IV
2010
IEEE
186views Visualization» more  IV 2010»
13 years 4 months ago
Visual Amortization Analysis of Recompilation Strategies
Abstract--Dynamic recompilation tries to produce more efficient code by exploiting runtime information. Virtual machines like the Jikes RVM use recompilation heuristics to decide h...
Stephan Zimmer, Stephan Diehl
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
13 years 10 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
HPCA
2003
IEEE
14 years 7 months ago
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
María Jesús Garzarán, Milos P...